Conventionally, in the field of semiconductor device manufacturing or the like, there has been known a plasma processing apparatus in which a process is performed onto a target substrate such as a semiconductor wafer by generating plasma in an airtightly sealed processing chamber. As a plasma processing apparatus, a plasma etching apparatus has been known.
As a plasma etching apparatus, there has been used a so-called capacitively coupled plasma etching apparatus in which plasma is generated by applying high frequency power between a mounting table (a lower electrode) on which a target substrate such as a semiconductor wafer is mounted and a shower head (an upper electrode) positioned above the mounting table to face the mounting table.
In the capacitively coupled plasma etching apparatus, an etching target area with respect to an excitation etching gas per unit volume is large near the center of the semiconductor wafer and small in the periphery of the semiconductor wafer, and, thus, an etching rate is low near the center of the semiconductor wafer and high in the periphery of the semiconductor wafer. Such a difference in the etching processing rate may cause deterioration of intra-surface uniformity of a process. For this reason, there has been suggested a method of uniformizing an intra-surface processing rate by concentrically dividing at least one of the upper electrode and the lower electrode into plural ones and changing the high frequency powers to be applied to the divided electrodes (see, for example, Patent Document 1).
Patent Document 1: Japanese Patent Laid-open Publication No. S63-24623
As described above, in the conventional technology, an upper electrode or a lower electrode, to which high frequency power for generating plasma for a plasma process is applied, is divided and the high frequency power to be applied to each of the divided electrodes is controlled so as to improve intra-surface uniformity of a process. However, in accordance with this technology, the upper electrode or the lower electrode to which high power is applied needs be divided. Thus, there is a problem in that manufacturing costs of the apparatus greatly increases. Further, since the high frequency power for generating plasma is controlled, a state of the plasma becomes unstable. Thus, there is a problem in that fine control of a processing state is difficult.
Furthermore, by way of example, a low damage plasma etching process has recently been performed using high density plasma by applying a first high frequency power for plasma generation of several tens of MHz or higher, e.g., about 100 MHz and a second high frequency power for ion attraction of a lower frequency (for example, from about 3 MHz to about 13.56 MHz) than that of the first high frequency power. However, in such a technology using a high frequency power, an absolute value of a DC bias (Vdc) is low in a peripheral portion of a semiconductor wafer, and, thus, an etching rate of the peripheral portion tends to decrease, which may cause deterioration in intra-surface uniformity of an etching process.